Errata and Corrections

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Even though we did every possible effort for the book to be totally error free, some errors still managed to sneak through the net. We are posting every reported inconsistency or misspelling on this page as soon as it comes to our attention. Most of these will be corrected in the next print. Please send any potential bug report to the following address: icbook@bwrc.eecs.berkeley.edu. We truly appreciate your inputs and feedback.

2nd Edition 

The second edition is now in its second print. The errata are organized along print version. The latest additions to this list date from November 03. 

Corrections to 2nd Print (March 03) - Will be corrected in next re-print.

  • pp. 30, line 2
    Replace "to get to the 90% point" by "to get from the 10% to the 90% point"
  • Page 94 - line 3
    missing space: '...inaccurate.In...' should be '...inaccurate. In...'
  • Page 95 - line above equation 3.35
    Replace "After canceling, we obtain" by "After canceling and simplification, we obtain"
  • pp. 97, 4th line of last paragraph
    Replace "� display identical I-V characteristics," by 
    "...display identical I-V characteristics." (replace comma by dot)
  • pp. 118, line 7
    Replace "industrywide" by "industry-wide"
  • Page 129, 3rd line in the 3rd bullet:
    missing spaces, subscript in VT:
    'sourcevoltagewithrespecttoathresholdvoltageVT,threeoperationregionshavebeenidentified:'
    should be 'source voltage with respect to a threshold voltage VT, three operation regions have been identified:'
  • Page 141 - Eq. 4.2. Please replace.
  • Page 153, line 5-6:
    '...great asset to the designers tool box' should be '...great asset to the designer's toolbox'
  • Page 153, line 9:
    '...waveform is a modeled...' should be '...waveform is modeled...'
  • Page 163 Figure 4-19 (b) should look like:

              (open circuit on the right side)

  • Page 199 - Table 5.2 - row 4, column 2
    drop hanging ")" after CJSW
  • Page 211 - 2nd Paragraph - line 5
    replace ", its output slope would be zero," by ", its output rise/fall time would be zero,"
  • Page 212, 2nd line from top
    replace "(i.e. zero input slope)" by "(i.e. infinite input slope)"
  • Page 218 - line after Eq. (5.45), 
    replace "The energy dissipation..." by "with VTE  = VT + VDSAT/2The energy dissipation ..."
  • Page 219 - Figure 5-29 (a): y-axis should be 'VDD' instead of 'vdd'
  • Page 226 - Section "The Power-Delay Product, or Energy per Operation", Paragraph 3, line 1
    Replace "the average energy consumed" by "the energy consumed"
  • Page 226 - Section "The Power-Delay Product, or Energy per Operation", Paragraph 3, line 2-3
    Replace "Remember that earlier ... event)." by "Most often we are interested in the energy consumed
    per switching cycle Eav.
    "
  • Page 226 - Eq. (5.57) VTe should be VTE
  • Page 230, last two lines, subscript and missing spaces:
     'c' inshould be subscript.
    'itbecomesincreasinglymoresignificantformedium-rangeandlongwires(SL < S).Theseconclusions' 
    should be 'it becomes increasingly more significant for medium-range and long wires (SL < S). These conclusions'
  • Page 231 second line from the bottom (missing spaces):
    'attentiontointerconnectisanabsolutenecessity,and   maychangethewaythenext-generationcircuits'
    should be 'attention to interconnect is an absolute necessity, and may change the way the next-generation circuits'
  • Page 239 - (3/24/03) second bullet, third line, missing comma: 
    '...AND OR, or XOR' should read '...AND, OR, or XOR'
  • Page 241, - (3/24/03) Figure 6-7, also, inconsistency in axis titles 
    'Vin, V' and 'Vout, V' should be 'Vin (V)' and 'Vout (V)'
  • Page 245 - Equation 6.3. Replace second occurrence by C2 by C3.
  • Page 247  - (3/24/03) Figure 6-12, caption, missing word 'of':
    'Layout a four-input...' should read 'Layout of a four-input' 
  • Page 253 - (3/24/03) Table 6-5, caption, 
    'Logic efforts' should read 'Logical efforts' 
  • Page 256 - (3/24/03), first line of the second paragraph, (inconsistency):
    'optimal stage effort' should be 'optimal gate effort'.
  • Page 269 - Figure 6-32, Caption. Replace caption by:
    "Figure 6-32 Advantage of  single-ended (a) over differential (b) gate."
  • Page 270 - (3/24/03), equation (6.30), 'Vtn0' should read 'VTn0'
  • Page 271 - Figure 6-35. Replace Figure by Figure shown below (an error caused by copy-editing):
  • Page 274, (3/24/03) 3rd and 4th line in the paragraph about level restoration, <2 commas missing>:
    '... to the output of the inverter its drain is connected to the input of the inverter and the source...' should read '... to the output of the inverter, its drain is connected to the input of the inverter, and the source...' 
  • Page 276, line 3
    Replace "In addiction" by "In addition"
  • Page 283, (3/24/03) error in Eq. (6.39):
    'tpbuf' should be 'tbuf'
  • Page 283, (3/24/03) Figure 6-51, mislabeled components:
    capacitor labeling 'C C' should read 'C
  • Page 284, (3/24/03) line 2:
    'tpbuf' should read 'tbuf'
  • Page 292, 2nd  line from top
    Replace "an NMOS style" by "a pseudo-NMOS style"
  • Page 294 - Figure 6-60. Replace Figure by Figure shown below (error caused by copy-editing)
  • Page 302, Figure 6.70. Labels Mp and Me on second stage were swapped
  • Page 341, Section 7.2.5, Line 6
    "complimentary" should read "complementary"
  • Page 345, Paragraph 4, line 2
    replace "NMOS of T1" by "PMOS of T1"
  • Page 345, Paragraph 4, line 7
    replace "PMOS of T1" by "NMOS of T1"
  • Page 355, Figure 7-36
    Replace "x" by "X" in Figure
  • Page 364, Paragraph 7.6.1, line 5
    Replace "different switching thresholds for" by "different switching thresholds for"
    (f of "for" should be italic, not bold)
  • Page 423, 3rd bullet, 3rd line
    replace "and they have spurned �" by "which has resulted in the creation of �".
  • Page 430, 2nd line from bottom
    Replace "/* delay between input pin A and ..." by "/* delay between input pin B and ..."
  • Page 454, Example 9.3, line 6
    Replace "0.76 ns" by "0.97 ns"
    NOTE: all errata from Page 454 to 456 have to do with the fact that (gamma) was not appropriately 
    accounted for in the analysis (that is, gamma was supposed to be 0)
  • Page 455, Eq 9.4. Replace Equation by
  • Page 456, Example 9.4, line 2.
    Replace "1.8 ns" by "1.89 ns"
  • Page 456, Eq 9.6. Replace Equation by
  • Page 456, Paragraph 3, line 2,
    Replace "40% more energy" by "80% more energy"
  • Page 456, Example 9.4, line 5.
    Replace "reduced by a factor of less than 2.5" by "reduced by a factor of less than 2"
  • Page 467, after Eq 9.9. Insert the following line
    "(assuming for simplicity sake that an extra repeater is added at the end of the line)."
  • Page 498, First Paragraph line 3
    "satisfy Eq. ." should read "satisfy Eq. (10.4)."
  • Page 498, First Paragraph line 8
    "...provoke violations of Eq. ." should read "...provoke violations of Eq. (10.4)."
  • Page 563, last line (missing a 0):
    A: 0000001; B: 01111111 should be A00000001; B: 01111111
  • Page 594, Figure 11-35. Replace Figure by:

    (1 FA is replaced by an HA)
  • Page 659, 6th line below eq. (12.4) replace:
    "...because it adds to the load of the bit line." by "...because it adds to the load of the word line."
  • ...

Corrections to 1st Print (December 02) - Removed in 2nd Print

  • Page xiii, line 2 in the second paragraph of the Acknowledgements:
    Sekhar Borkar should read Shekhar Borkar.
  • Page xiv last sentence:
    They been... should read: They have been...
  • Page 80 - Example 3.2 Line 7
    0.23 A should read 0.23 mA
  • Page 185 - Eq 5.2. Missing minus sign. Replace equation by:
  • Page 209. Figure 5-21(a). Correct figure (dotted lines were misaligned):
  • Page 238 - Figure 6-3 Caption:
    (b) Pulling up a node by using NMOS and PMOS switches
  • Page 241 - Figure 6-7. Replace all there "0 1" in figure by "0 -> 1"
  • Page 243 - the footnote at the bottom of the page should read:
    1In-deep submicron processes, the transistors in stacks are less velocity saturated, and do not have to be made as wide.  For a two-input NAND the NMOS transistors should be made only about 1.5 times wide instead of 2 times.
  • Page 280 - Eq. (6.34). Replace equation by:
  • Page 608. Fourth line from the bottom. Replace:
    "increment. Hence, we rather do it" by "increment, we rather do it"